What is RISC-V? Why does CKB-VM choose RISC-V?

Author: CKB

The emergence of blockchain has enabled better implementation and development of smart contracts, and there exists an important role between blockchain and smart contracts: the Virtual Machine.

The emergence of blockchain has enabled better implementation and development of smart contracts, and there is an important role between blockchain and smart contracts: the Virtual Machine.

The concept of virtual machines was introduced in the sixties of the last century, and it became popular only in the nineties. At that time, the web spanned many different operating systems and browsers, and if a developer wanted to make an application, they needed to adapt to all the different operating systems. As you know, app development is now divided into Android and iOS, and the situation was even more complicated back then. It just so happened that the Java programming language became popular, and Java built a virtual machine that allowed programs to be written only once, and could run on multiple platforms based on the Java virtual machine, so the slogan at that time was: compile once, run everywhere.

We know that Bitcoin does not have a virtual machine because Bitcoin simply transfers a segment of numbers (that is, "Bitcoin") from address A to address B. Ethereum, on the other hand, proposes: why can't what is executed on the blockchain be a set of code that can achieve more complex and diverse things? This is what we refer to as a smart contract platform, where all nodes run the same contract code and receive completely identical results.

On the blockchain, a virtual machine is the execution environment for smart contracts, which is a complete computing system that can be fully isolated from the outside. The blockchain calls and executes smart contracts through the virtual machine and requires all nodes to reach consensus. The nodes use different systems; some machines are 64-bit, while others are 32-bit. Traditional Java virtual machines tolerate slight differences in computation results, but on the blockchain, all results must be the same. Therefore, a new virtual machine suitable for the blockchain is essential.

Ideal Blockchain Virtual Machine Every blockchain project's virtual machine design has its own artistic pursuit, making different trade-offs at various levels while pursuing numerous characteristics. After extensive research, we believe that the ideal blockchain virtual machine should be like this:

There is sufficient determinism at runtime, and when calling the same smart contract input, it should return the same output result, which does not depend on external conditions such as time, runtime environment, etc.

The runtime is sufficiently secure, and the execution of the virtual machine does not negatively affect the platform itself; Be flexible enough for updates so that blockchains can upgrade or add cryptographic algorithms without going through a hard fork (think back to the pain of Ethereum hard fork upgrades);

Sufficiently transparent information allows smart contracts running on the virtual machine to fully leverage the potential of the virtual machine; a sufficiently reasonable fee mechanism ensures that the calculation of resource consumption during the virtual machine's operation is more reasonable and accurate.

It can support different language compilations, allowing developers to freely develop and apply the latest technology.

Before designing the Nervos CKB virtual machine, we found that many blockchain projects do not construct their virtual machines using real CPU instruction sets; instead, they tend to choose WASM to build their virtual machines.

We prefer to build our VMs with a real CPU instruction set, because at the very bottom of any complex VM, operations need to be converted into primitive assembly instructions to perform operations on the CPU. In addition, using a real CPU instruction set does not introduce some semantic constraints at the design level and constrain the flexibility of the virtual machine.

To make an inappropriate analogy, operating a CPU requires a set of language systems; using the actual CPU instruction set is like being able to "speak" directly with the CPU in this language system, which is very convenient. Otherwise, it’s like first speaking in Chinese and then translating it into English; no matter how perfect the translation level, there will always be some deviations and constraints.

By using a real CPU instruction set, the virtual machine can add any type of data structure or algorithm as needed, allowing developers to write any contracts that meet their requirements to the maximum extent. Therefore, we decided to boldly attempt to construct our own virtual machine, CKB-VM, using a real CPU instruction set.

In the selection of CPU instruction sets, we chose the streamlined open-source instruction set RISC-V. RISC-V can meet the implementation requirements from low-power small microprocessors to high-performance data center (DC) processors, and features transparency, simplicity, modularity, wide support, and maturity. These characteristics perfectly align with the design requirements of CKB-VM. So, what exactly is RISC-V?

RISC-V RISC-V is a clear, simple, open-source CPU instruction set architecture that originated at the University of California, Berkeley.

In 2010, due to the limitations of other commercial closed-source instruction sets, a team of researchers at the university designed an entirely new set of open-source instructions from scratch when they started a new project. With a large number of registers and transparent instruction execution speeds, this new set of instructions helps compiler and assembly language programmers convert real-world important problems into proper, efficient code, and contains less than 50 instructions. This set of instructions is RISC-V.

When architects designed RISC-V, they hoped that RISC-V could work effectively on all computing devices. Since its invention in 2010, RISC-V's simple design has won wide support from both industry and academia, and has gained the affection of the community.

RISC-V Foundation The development of the RISC-V instruction set is primarily driven by the RISC-V Foundation and the community. The RISC-V Foundation was established in 2015 and is a nonprofit organization as well as the first open and collaborative community for hardware and software innovators.

The RISC-V Foundation currently has more than 235 members, including Google, Qualcomm, Apple, IBM, Tesla, Huawei, and others. Members can participate in the development and use of RISC-V instruction set specifications and participate in the development of related hardware and software ecosystems.

Due to its streamlined and open-source design, RISC-V has gained popularity in some academic institutions, such as the University of California, Berkeley, Massachusetts Institute of Technology, Princeton University, and the Institute of Computing Technology, Chinese Academy of Sciences. In addition, some government agencies, such as the Indian government and the Shanghai Municipal Economic and Information Commission, also strongly support projects based on RISC-V.

The existing instruction set RISC-V is a very young instruction set, so what were the main instruction sets before this?

In the PC era, x86 was the unshakeable dominant force. x86 is CISC (Complex Instruction Set Computer), which differs from RISC (Reduced Instruction Set Computer). The CISC instruction set continues to grow with development. This leads to rising costs and impacts performance and power consumption. Moreover, the length and execution time of CISC instruction sets are not fixed, making it difficult to find a high-efficiency general design path to execute instructions. After the popularity of smartphones, ARM became the darling of the mobile sector. ARM, being a Reduced Instruction Set (RISC), has characteristics of low power consumption and low cost. However, in order to maintain backward compatibility, ARM needs to retain many outdated definitions, resulting in significant redundancy in the instruction set, which increases the complexity of ARM architecture documentation.

In the current landscape dominated by x86 and ARM, RISC-V brings new vitality to the market:

Simplify

After decades of development, the architecture documentation for x86 and ARM has grown to thousands of pages, which almost takes an engineer nearly a month to read, compared to 1-2 days to read RISC-V documentation. This is because RISC-V only picks out the most commonly used instruction sets and optimizes them specifically, while the less commonly used instructions can be done in a combination of a few basic instructions, which can greatly improve efficiency. For example, if we're using x86, we'll have to buy an entire supermarket to get what we need. RISC-V, on the other hand, is a one-to-one supermarket where customers only need to pick and pay for what they need.

Open Source:

Both ARM and x86 are closed-source projects with extremely stringent licensing terms: Intel does not allow any company other than AMD and VIA to use the x86 instruction set; obtaining a license for the ARM instruction set may cost tens of millions of dollars, and once the license expires, there will be a need to renegotiate the licensing terms. RISC-V is a truly open-source project, often referred to as the Linux of the hardware field. In fact, the original intention of Professor David Patterson, Professor Krste Asanovic, Andrew Waterman, and Yunsup Lee, who invented RISC-V, was to hope that "Instruction Sets Want to be Free", allowing any company, university, research institution, or individual in the world to develop processors compatible with the RISC-V instruction set and to integrate into the software and hardware ecosystem built on RISC-V.

RISC-V uses the BSD License open source protocol, which allows users to modify and redistribute open source code, and also permits the development, release, and sale of commercial software based on the open source code.

When Blockchain Meets RISC-V RISC-V has been applied in many technological fields and is now gradually developing in the blockchain sector. As an instruction set architecture that has only been validated on CPUs, applying RISC-V in the blockchain domain is indeed a bold attempt, as it builds a virtual machine for blockchain projects rather than hardware processors.

We are not sure whether such an attempt will be successful, but we have reason to believe that a virtual machine built on open-source RISC-V can effectively bridge the gap between the hardware and software industries, and provide a richer development ecosystem.

Why did CKB choose to develop its own virtual machine? Starting from first principles, we have different answers. In the design philosophy of Nervos CKB, we always adhere to a core principle: to build a flexible, secure, and scalable Layer 1 infrastructure for global developers. Smart contracts are one of the most important infrastructures in the public chain ecosystem, and their operation relies on a virtual machine (VM). When designing CKB-VM, we did not choose the mainstream WASM solution, but instead rethought what virtual machine architecture is most suitable for blockchain from first principles.

While the whole world is building Layer 2, CKB has returned to the essence of Layer 1. In the design of Nervos, we have always believed that a truly powerful Layer2 must be built on a sufficiently strong Layer1. The existence of CKB-VM allows CKB to become a universal platform that can natively support any Layer2, ZKP computation, circuit execution, and even the self-evolution capability of Layer1.

This is our understanding of blockchain infrastructure and a new definition of "layered programmability."